rev. 1.0 february 2015 www.aosmd.com page 1 of 7 AOZ8308 low capacitance 2.5 v tvs diode general description the AOZ8308 is a transient voltage suppressor array designed to protect high speed data lines from esd and lightning. this AOZ8308 incorporates eight surge rated, low capacitance steering diodes and a tvs in a single package. during transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. the AOZ8308 may be used to meet the esd immunity requirements of iec 61000-4-2, level 4 and iec 61000-4-5. the tvs diodes provide effective supp ression of esd voltages: 30 kv (air discharge) and 30 kv (contact discharge). the AOZ8308 comes in a halogen free and rohs compliant so-8 package and is rated over a -40 c to +85 c ambient temperature range. the AOZ8308 is compatible with both lead free and snpb assembly techniques. the small size, low capacitance and high esd protection makes the AOZ8308 ideal for protecting high speed video and data communication interfaces. features ? esd protection for high-speed data lines: ? iec 61000-4-2, level 4 (esd) immunity test ? 30 kv (air discharge) and 30 kv (contact discharge) ? iec 61000-4-4 (eft) 40 a (5/50 ns) ? iec 61000-4-5 (lightning) 25 a ? human body model (hbm) 30 kv ? protects four i/o lines ? low clamping voltage ? low operating voltage: 2.5 v applications ? 10/100 ethernet ? usb 2.0 power and data line protection ? video graphics cards ? monitors and flat panel displays ? digital video interface (dvi) ? t1/e1 telecom ports typical application figure 1. 10/100 ethernet port connection 1 2 3 4 8 7 6 5 AOZ8308 10/100 ethernet phy rj45 connector tx+ tx- rx- rx+ 75 75 vcc
AOZ8308 rev. 1.0 february 2015 www.aosmd.com page 2 of 7 ordering information aos green products (with ?l? suffix) use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/media/aosgreenpolicy.pdf for additional information. pin configuration part number ambient temperature range package environmental AOZ8308so-02 -40 c to +85 c so-8 green product so-8 (top view) 1 2 3 4 8 7 6 5 figure 2. circuit diagram figure 3. low capacitance protection of two differential line pairs pin 6, 8 pin 5, 7 pin 1, 3 pin 2, 4 1 2 3 4 8 7 6 5 line 1 line 2 line 3 line 4 line 1 line 2 line 3 line 4
AOZ8308 rev. 1.0 february 2015 www.aosmd.com page 3 of 7 absolute maximum ratings exceeding the absolute maximum ratings may damage the device. notes: 1. iec 61000-4-2 discharge with c discharge = 150 pf, r discharge = 330 ? . 2. human body discharge per mil-std-883, method 3015 c discharge = 100 pf, r discharge = 1.5 k ? . maximum operating ratings electrical characteristics t a = 25c unless otherwise specified. notes: 3. these specifications are guaranteed by design. 4. the working peak reverse voltage, v rwm , should be equal to or greater than the dc or continuous peak operating voltage level. 5. v br is measured at the pulse test current i t . parameter rating vp ? gnd 2.5 v peak pulse current (i pp ), t p = 8/20 s 25 a peak power dissipation (8 x 20 s@ 25 c) 450 w storage temperature (t s ) -65 c to +150 c esd rating per iec61000-4-2, contact (1) 30 kv esd rating per iec61000-4-2, air (1) 30 kv esd rating per human body model (2) 30 kv parameter rating junction temperature (t j ) -40 c to +125 c symbol parameter conditions min. typ. max. units v rwm reverse working voltage between pins 1 and 2 (4) 2.5 v i r reverse leakage current v rwm = 2.5 v, between pins 1 and 2 0.1 a v br reverse breakdown voltage i t = 100 a 2.8 v v cl channel clamp voltage each line i pp = 5 a, tp = 8/20 s (3) 5.5 v channel clamp voltage each line i pp = 10 a, tp = 8/20 s (3) 7.5 v channel clamp voltage each line i pp = 25 a, tp = 8/20 s (3) 15 v c j junction capacitance v r = 0 v, f = 1 mhz, each line (3) 1.2 2.5 pf
AOZ8308 rev. 1.0 february 2015 www.aosmd.com page 4 of 7 typical performance characteristics 4 6 8 10121416 1820 peak pulse current va. clamping voltage (tr = 8s, td = 20s) 25 20 15 10 5 0 clamping voltage (v) peak pulse current (a) 0 0.5 1.5 1.0 2.0 2.5 typical variation of cin vs. vr (f = 1mhz, t = 25c) 2.0 1.5 1.0 0.5 0 working voltage (v) jucntion capacitance (pf)
AOZ8308 rev. 1.0 february 2015 www.aosmd.com page 5 of 7 application information the AOZ8308 tvs is design to protect four data lines from fast damaging transient over-voltage by clamping the over-voltage to a reference. when the transient on a protected data line exceeds the reference voltage, the steering diode is forward bias and conducts harmful esd transients away from the sensitive circuitry under protection. pcb layout guidelines printed circuit board layout is the key to achieving the highest level of surge immunity on power and data lines. the location of the protection devices on the pcb is the simplest and most important design rule to follow. the AOZ8308 devices should be lo cated as close as possible to the noise source. the placement of the AOZ8308 devices should be used on all data and power lines that enter or exit the pcb at th e i/o connector. in most systems, surge pulses occur on data and power lines that enter the pcb through the i/o connector. placing the AOZ8308 devices as close as possible to the noise source ensures that a su rge voltage will be clamped before the pulse can be coupled into adjacent pcb traces. in addition, the pcb should use the shortest possible traces. a short trace length equates to low impedance, which ensures t hat the surge energy will be dissipated by the AOZ8308 device. long signal traces will act as antennas to receive energy from fields that are produced by the esd pulse. by keeping line lengths as short as possible, the efficiency of the line to act as an antenna for esd related fields is reduced. minimize interconnecting line lengths by placing devices with the most interconnect as close together as possible. the protection circuits should shunt the surge voltage to either the reference or chassis ground. shunting the surge voltage directly to the ic?s signal ground can cause ground bounce. the clamping performance of tvs diodes on a single ground pcb can be improved by minimizing the impedance with relatively short and wide ground traces. the pcb layout and ic package parasitic inductances can cause signific ant overshoot to the tvs? clamping voltage. the inductance of the pcb can be reduced by using short trace lengths and multiple layers with separate ground and power planes. one effective method to minimize loop problems is to incorporate a ground plane in the pcb design. the AOZ8308 low capacitance tvs is designed to protect four high speed data transmission lines from transient over-voltages by clamping them to a fixed reference. the low inductance and construction minimizes voltage overshoot during high current surges. when the voltage on the protected line exceeds the reference volt age the internal steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. good circuit board layout is critical for the suppression of esd induced transients. the following guidelines are recommended: 1. place the tvs near the i/o terminals or connectors to restrict transient coupling. 2. fill unused portions of the pcb with ground plane. 3. minimize the path length between the tvs and the protected line. 4. minimize all conductive loops including power and ground loops. 5. the esd transient return path to ground should be kept as short as possible. 6. never run critical signals near board edges. 7. use ground planes whenever possible. 8. avoid running critical signal traces (clocks, resets, etc.) near pcb edges. 9. separate chassis ground traces from components and signal traces by at least 4 mm. 10. keep the chassis ground trace length-to-width ratio < 5:1 to minimize inductance. 11. protect all external connections with tvs diodes.
AOZ8308 rev. 1.0 february 2015 www.aosmd.com page 6 of 7 package dimensions, so-8l notes: 1. all dimensions are in millimeters. 2. dimensions are inclusive of plating 3. package body sizes exclude mold flash and gate burrs. mold flash at the non-lead sides should be less than 6 mils. 4. dimension l is measured in gauge plane. 5. controlling dimension is millimeter, converted inch dimensions are not necessarily exact. symbols a a1 a2 b c d e e e1 h l dimensions in millimeters recommended land pattern min. 1.35 0.10 1.25 0.31 0.17 4.80 3.80 5.80 0.25 0.40 0 d c l h x 45 7 (4x) b 2.20 2.87 5.74 0.80 0.635 unit: mm 1.27 a1 a2 a 0.1 gauge plane seating plane 0.25 e 8 1 e e1 nom. 1.65 1.50 4.90 3.90 1.27 bsc 6.00 max. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 6.20 0.50 1.27 8 symbols a a1 a2 b c d e e e1 h l dimensions in inches min. 0.053 0.004 0.049 0.012 0.007 0.189 0.150 0.228 0.010 0.016 0 nom. 0.065 0.059 0.193 0.154 0.050 bsc 0.236 max. 0.069 0.010 0.065 0.020 0.010 0.197 0.157 0.244 0.020 0.050 8
rev. 1.0 february 2015 www.aosmd.com page 7 of 7 AOZ8308 part marking AOZ8308so (so-8) part number code assembly lot code year code and week code fab code & assembly location code z8308so fa ywlt as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. legal disclaimer alpha and omega semiconductor makes no representation s or warranties with re spect to the accuracy or completeness of the information provid ed herein and takes no liabilities fo r the consequences of use of such information or any product described herein. alpha and omega semiconductor reserves t he right to make changes to such information at any time without further notice. this document does not constitute the grant of any intellectual property rights or representation of non-infringeme nt of any third party?s intellectual property rights. life support policy alpha and omega semiconductor products are not authorized for use as critical components in life support devices or systems.
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